A TFT array substrate is one of indispensability parts for manufacturing TFT panel. As shown in FIG. 1, a conventional TFT array substrate comprises a glass base 1, a light shielding layer 2 formed on the glass base 1, and a low hydrogen layer 3 formed on the light shielding layer 2. The light shielding layer 2 is an amorphous silicon light shielding layer 21. The low hydrogen layer 3 comprises a first silicon oxide layer 31, silicon nitride layer 32, a second silicon oxide layer 33, and a low hydrogen amorphous silicon layer 34 which are formed on the light shielding amorphous silicon layer 21 in turns.
A short time is taken to form the light shielding layer 2 because it only comprises one layer of amorphous silicon light shielding layer 21, while a long time is taken to form the low hydrogen layer 3 because it comprises four layers. Therefore, during manufacturing of the above conventional TFT array substrate, the device for forming the light shielding layer 2 is always lying idle, while the device for forming the low hydrogen layer 3 is always face a bottleneck in production, such that the production of the light shielding layer 2 does not match that of the low hydrogen layer 3, which leads to low production capacity of TFT array substrate. Moreover, many types of layers in the low hydrogen layer 3 are formed by the same machine, which will cause risks such as cross contamination.
In addition, in the conventional TFT array substrate, the second silicon oxide layer 33 under the low hydrogen amorphous silicon layer 34 is thin, which is unstable to be converged. The amorphous silicon light shielding layer 21 is directly formed on the glass base 1, which has poor anti-static electric capacity.
The foregoing information is only used for easily understanding the background of the present disclosure, which may include information in the prior art not well known by the person skilled in the art.